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| 1 |
8,431,458 |
Methods of forming a nonvolatile memory cell and methods of forming an
array of nonvolatile memory cells
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| 2 |
8,426,301 |
Three-dimensional nonvolatile memory devices having sub-divided active
bars and methods of manufacturing such devices
|
| 3 |
8,409,951 |
Metal control gate formation in non-volatile storage
|
| 4 |
8,404,600 |
Method for forming fine pitch structures
|
| 5 |
8,399,919 |
Unit block circuit of semiconductor device
|
| 6 |
8,395,221 |
Depletion-free MOS using atomic-layer doping
|
| 7 |
8,373,165 |
Semiconductor integrated circuit device and a method of fabricating the
same
|
| 8 |
8,372,740 |
Methods for increased array feature density
|
| 9 |
8,367,535 |
Method of fabricating semiconductor device
|
| 10 |
8,367,508 |
Self-aligned contacts for field effect transistor devices
|
| 11 |
8,361,864 |
Semiconductor device having a saddle fin shaped gate and method for
manufacturing the same
|
| 12 |
8,357,606 |
Resist feature and removable spacer pitch doubling patterning method for
pillar structures
|
| 13 |
8,350,344 |
Semiconductor device and method of fabricating the same
|
| 14 |
8,349,719 |
Semiconductor device and method for fabricating the same
|
| 15 |
8,338,919 |
Semiconductor device with strain
|
| 16 |
8,330,234 |
Semiconductor device and manufacturing process therefor
|
| 17 |
8,330,219 |
Semiconductor device with high-voltage breakdown protection
|
| 18 |
8,330,211 |
Semiconductor device with vertical channel transistor and low sheet
resistance and method for fabricating the same
|
| 19 |
8,309,449 |
Semiconductor device and method for forming the same
|
| 20 |
8,304,300 |
Method of manufacturing display device including transistor
|
| 21 |
8,293,631 |
Semiconductor devices having tensile and/or compressive stress and methods
of manufacturing
|
| 22 |
8,293,319 |
Method for manufacturing light-emitting device
|
| 23 |
8,288,262 |
Method for fabricating semiconductor device
|
| 24 |
8,278,203 |
Metal control gate formation in non-volatile storage
|
| 25 |
8,253,443 |
Interconnection architectures for multilayer crossbar circuits
|
| 26 |
8,252,638 |
Method for forming under a thin layer of a first material portions of
another material and/or empty areas
|
| 27 |
8,247,857 |
Nonvolatile semiconductor memory device and method for manufacturing same
|
| 28 |
8,247,290 |
Semiconductor device and method of manufacturing thereof
|
| 29 |
8,236,664 |
Phase change memory device accounting for volume change of phase change
material and method for manufacturing the same
|
| 30 |
8,227,306 |
Multiple-layer non-volatile memory devices, memory systems employing such
devices, and methods of fabrication thereof
|
| 31 |
8,227,305 |
Memory array with ultra-thin etched pillar surround gate access
transistors and buried data/bit lines
|
| 32 |
8,216,949 |
Method for integrated circuit fabrication using pitch multiplication
|
| 33 |
8,216,935 |
Methods of forming transistor gate constructions, methods of forming NAND
transistor gate constructions, and methods forming DRAM transistor gate
constructions
|
| 34 |
8,216,888 |
Eliminating poly uni-direction line-end shortening using second cut
|
| 35 |
8,207,053 |
Electrodes of transistors with at least two linear-shaped conductive
structures of different length
|
| 36 |
8,203,173 |
Semiconductor integrated circuit
|
| 37 |
8,198,655 |
Regular pattern arrays for memory and logic on a semiconductor substrate
|
| 38 |
8,182,863 |
Deposition method and manufacturing method of light-emitting device
|
| 39 |
8,173,545 |
Method for the fabrication of a transistor gate using at least one
electron beam
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| 40 |
8,173,532 |
Semiconductor transistors having reduced distances between gate electrode
regions
|
| 41 |
8,173,491 |
Standard cell architecture and methods with variable design rules
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| 42 |
8,168,520 |
Method of manufacturing semiconductor device
|
| 43 |
8,168,488 |
Systems and methods for reducing contact to gate shorts
|
| 44 |
8,158,517 |
Method for manufacturing wiring substrate, thin film transistor, display
device and television device
|
| 45 |
8,158,502 |
Method of manufacturing a semiconductor device including a silicon pillar
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| 46 |
8,153,487 |
Semiconductor device and method for manufacturing the same
|
| 47 |
8,138,075 |
Systems and methods for the manufacture of flat panel devices
|
| 48 |
8,134,185 |
Integrated circuit having gate electrode level region including at least
seven linear-shaped conductive structures at equal pitch including
linear-shaped conductive structure forming transistors of two different
types and at least three linear-shaped conductive structures having
aligned ends
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| 49 |
8,134,184 |
Integrated circuit having gate electrode level region including at least
four linear-shaped conductive structures with some outer-contacted
linear-shaped conductive structures having larger outer extending portion
than inner extending portion
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| 50 |
8,133,777 |
Method of fabricating memory
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